Chiang Mai Journal of Science

Print ISSN: 0125-2526 | eISSN : 2465-3845

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Low Threshold Voltage Pentacene OTFTs with O2 Annealed Pr2O3 Gate Insulating Layer

Prasanta Kumar Saikia, Puja Saikia, Ranjit Sarma and Dipok Saikia
* Author for corresponding; e-mail address: puja.saik@gmail.com
Volume: Vol.38 No.4 (OCTOBER 2011)
Short Communication
DOI:
Received: -, Revised: -, Accepted: -, Published: -

Citation: Saikia P..K.., Saikia P.., Sarma R.. and Saikia D.., Low Threshold Voltage Pentacene OTFTs with O2 Annealed Pr2O3 Gate Insulating Layer, Chiang Mai Journal of Science, 2011; 38(4): 653-657.

Abstract

Pentacene  OTFTs  have  been  successfully  reported  using  Pr2O3  as  a  gate  insulator. The  use  of  high  dielectric  constant  gate  dielectric  reduces  the  threshold  voltage  of  the  OTFTs  bellow-1V. The  technique  high  temperature  O2  annealing  is  success  fully  used  to  improve  the  surface  geometry  of  Pr2O3  films. The  fabricated  OTFTs  gives  very  low  threshold  voltage-0.8V  and  sub-threshold  swing  0.9V/decade. The  calculated  ON-OFF ratio  is  1.2x104  and  mobility  is  0.043cm2/V.s.

Keywords: pentacene, organic thin film transistors, low threshold voltage

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